引用:
Originally posted by idiot
First I spelled "redundancy" wrong in my first reply so i apologize for any confusion that might cause.
see
http://www.computer.org/proceedings...04060291abs.htm
its a circuit/logic design technique to improve yield. Its not a process based tech. Also DRAM, EDRAM processes and logic processes are all different, and to achieve the clock speeds required by today's CPUs its impossible to use the EDRAM process provided by the various fabs. The main problem is transistor leakage. Also note that the 128MB L2 cache die used on Power4s are not based on the same processes the CPU core dies use.
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Can't open that PDF, need password and username.
And if PowerPC isn't used in same prcoess for core and cache, then I think more photo-masks will result in cost-increasing. Or they use another tech to package two die? Need your further comments, Thanks.