引用:
Originally posted by idiot
code_hard: however cache areas are redundency protected, unlike the "core" part of the die. which makes them much less "sensative" to defects.
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Can you tell me what is redundency protected?
A fabrication process technology or something else?
Depend on my knowledge, Memory and Logic process have different key points to take care. Maybe it's why it's hard to embed large amount memory in CoreLogic like some VGA chips in Notebook.